semana cheia, cursos e webinários de alto nível, confira a programação. A programação para o mês você encontra na seção de Cursos e Webinários.
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This Track will introduce you to a real-time kernel that manages the CPU’s time as well as many of the resources found in today’s processor-based embedded systems. A kernel can be used on small (8-bit) to large (32-bit) applications and can actually help accelerate your product’s development. This series of classes will provide you with enough information to allow you to decide whether your next embedded application can benefit from the use of a real-time kernel. It’ll also help you select the right one for your application.
- July 15 | Day 1 – What is a Real-Time Kernel?
- July 16 | Day 2 – Task Management
- July 17 | Day 3 – Scheduling & Context Switching
- July 18 | Day 4 – Time and Resource Management
- July 19 | Day 5 – Signaling, Inter-Task Communications and Debugging
The Internet of Things relies on networks of connected devices at unprecedented scale and complexity. Maximizing the opportunity requires organizations to collect and process high velocity sensor data in real-time. This Webinar presents how real-time operational intelligence is shaping the Internet of Everything, transforming log file and sensor machine data streams into actionable, real-time intelligence. Use cases from Intelligent Transportation, Telematics and M2M will be presented.
In this webinar, participants will gain valuable insights into:
– the business case for Internet of Everything applications,
– real-time architectures for the collection and processing of large-scale sensor data,
– turning sensor data into real-time, actionable intelligence,
– industry case studies including Intelligent Transportation, Smart Cities, Wireless Machine-to-Machine (M2M) and Telematics.
Details | The webinar will be held from 11:00AM to 12:00PM PST on Tuesday, July 16th 2013. Questions can be submitted in advance at firstname.lastname@example.org, or live during the webinar. Registration will be open for 7 days only. Limited seating.
This webcast will provide an update on the range of camera types available for machine vision and spell out which applications each fits best. To facilitate decision making for webcast attendees, the speaker will present a straightforward decision-tree model that can be used for any number of projects. He will discuss different machine vision configurations, and explore pros and cons as well as application suitability, offering plenty of examples. Specifically, the webcast will cover area array and line-scan cameras, compare CCD and CMOS technologies, and present the pros and cons of monochrome vs. color. It will explore the concepts of speed, resolution, use (or not) of frame grabbers, and jitter and latency, and also explain interface standards options, including Camera Link, GigE, USB 3 Vision, analog RGB, and HDTV.
What You’ll Learn:
- How to simplify the task of camera selection for your machine vision application
- The types of cameras available and what applications each one best suits
- How to make sense of interface standards options
- What the concepts of speed, resolution, jitter, latency, and frame grabbing mean in relation to machine vision.
Reserve your space to attend the ANSYS-Apache Power, Noise and Reliability webinar series showcasing popular customer experience sharing presentations from DAC 2013 including Freescale, GlobalFoundries and Nvidia.
Navigating the compliance standards for high-speed digital standards can be a difficult process. This panel comprised of the standards compliance gurus will help attendees understand how to successfully negotiate the standards process by understanding how standards organizations operate, and define compliance. Each of the 3 presenters will give a key insights to standards compliance such as: What happens when you don’t pass compliance, interoperability issues, compliance workshops, and what to do when there isn’t a formal compliance program. Lastly, we’ll open the floor for questions from the audience.
Process improvement consistently brings new equipment and technologies to the market. But leveraging the benefits of new systems with old legacy equipment relies on effective data communication. As part of the B&B Electronics Connectivity College, learn how to make the most out of your equipment investments, new and old. Mike and Brian will cover practical topics to help you bulletproof your industrial network.
|What attendees will learn:|
Energy efficient designs and new regulatory requirements have created new and complex test challenges for power conversion devices. Today’s Engineers are faced with numerous difficult measurements including power conversion efficiency, and troubleshooting fast-switching circuits, along with several other test challenges.
Join Tektronix for a 40-minute webinar to learn techniques to accurately measure conversion efficiency and other performance parameters using a precision power analyzer. Real-life test devices will be used including a motor drive, inverter and a power supply to highlight test methods across various applications.
You Will Learn To:
- Perform consistent accurate measurements on highly distorted signals
- Reliably track fundamental frequency in the presence of high-frequency carrier signal
- Overcome noise problems in fast switching circuits
- Improve common-mode rejection for better measurement accuracy
- Choose between internal and external current shunts
- Easily, efficiently collect data for post-processing and reporting
For many years, the electronics, automotive, military, aerospace and medical device industries have used conformal coatings to protect devices from their environments, provide thermal or electrical insulation, improve lubricity, immobilize particulates, stabilize delicate structures, function as a primer or interface that is non-inhibitory to tissue growth, ….and the list goes on.
While there are a host of conformal coatings that offer one coating characteristic or another, a drawback to many modern coatings is that they are unable to protect the small, increasingly complex devices that are being designed for the latest innovative technologies. Poly(para-xylylene), known as Parylene, is an ultra-thin, inert, transparent coating that meets these unique challenges. Parylene provides highly useful dielectric and barrier properties per unit thickness, as well as extreme chemical inertness and freedom from pinholes. The coating is also biocompatible. Parylene protects components and devices, including circuit card assemblies, MEMS, sensors, LEDs, cores, lab-on-a-chip devices, pacemakers, electrosurgical tools, stents and cochlear implants, to name only a few.
Parylene deposition takes place in an evacuated, room temperature chamber through a process known as vapor deposition polymerization (VDP). Sometimes also identified as CVD, this process involves the spontaneous polymerization of a conformal coating on all exposed substrate surfaces and edges, and into crevices at a predictable rate, with thickness controllable from 500 angstroms to 75 microns.
This webinar will focus on the Parylene’s unique properties, how the coating is applied, examples of applications that benefit from Parylene’s properties, and advances that have been made in adhesion technologies. The webinar will also address a new antimicrobial Parylene technology that is now available.
As materials and applications continue to advance, Parylene coatings are increasingly being used to enhance the reliability of innovative technologies.
Lighting is subject to regulatory guidelines at the state and country level in North America, and at country levels around the globe. Energy standards include product regulations, building standards, market transformation programs and high efficiency or green building guidelines. This webcast will look at some of the most significant regulatory issues facing the lighting industry and how this will impact the LED market.
The LEDs Magazine Webcast on lighting regulations and standards will be presented by IES Fellow and Acuity regulatory expert Cheryl English, and will focus on programs that specifically impact LED-based lighting, and the transition of the lighting industry from legacy sources to SSL. The presentation will take a quick look at legacy regulations, and examine how the regulatory landscape is evolving to support LEDs.
The presentation will focus primarily on North America, including California-centric regulations that in many cases are leading the broader US-wide programs. The discussion will include a brief look at the Canadian regulatory landscape. Still the global audience should find the material compelling both because global companies do business in the US, and because there are similar LED regulatory programs being put in place in every region of the world.
What You’ll Learn:
- The complex regulator landscape that impacts lighting at the state and national level in the US.
- How regulatory programs apply to, impede, or encourage the transition to LED-based lighting.
- The broad set of regulatory bodies that in some way impact light projects in terms of efficiency guidelines, green requirements, building standards, and more.
oday’s modern battlefield programs demand ever-increasing performance and connectivity capabilities. High compute density is critical in image-intensive radar and sonar applications and is fast rising to the top of current military system requirements. That is because next-generation radar and sonar applications that are expected to make a tremendous jump in a processing power and data I/O bandwidth. Coming to the aid of these systems that need greater levels of CPU processing and offering an optimal solution where designers no longer need to make performance compromises or are forced to move to proprietary solutions are new pre-integrated high performance embedded computing (HPEC) VPX-based systems. Join Kontron and Intel to learn how ruggedized mainstream IT technology can be used to enable military system developers to drastically reduce the process from design to field deployment, along with breakthrough technology that restores I/O & CPU performance ratios.
What You’ll Learn:
- High Performance Embedded Computing combines the latest processor and interconnect technologies to solve the most challenging compute applications
- The use of mainstream IO technology can drastically reduce the process from design to field deployment and still maintain performance
- Higher bandwidth connectivity with PCIe 3.0 can deliver 40GbE equivalent data transfer rates using common TCP/IP protocols
- To pack more computing power into smaller size, weight, and power (SwaP) subsystems for EO/IR, EW, C4I, Radar, Sonar and many other applications
- COTS-based computer systems reduce development and time to market risks to systems developers
At the lowest level, Open Source – VHDL Verification Methodology (OS-VVM), is a set of packages that provide concise and powerful methods to implement functional coverage and randomization. OS-VVM uses these packages to create an intelligent testbench methodology that allows mixing of “Intelligent Coverage™” with directed, algorithmic, file based, or constrained random test approaches. Having an intelligent testbench approach built into the coverage modeling puts OS-VVM a step ahead of other verification methodologies, such as SystemVerilog and UVM.
- What and Why OS-VVM, Functional Coverage, and Randomization
- Writing Item (Point Coverage)
- Writing Cross Coverage
- Constrained Random is 5X or More Slower
- Intelligent Coverage
- OS-VVM is More Capable
- Additional Randomization in OS-VVM
- Weighted Intelligent Coverage
- Coverage Closure
- OS-VVM Loves any Testbench
- Additional Methods for Verification
- Faster Test Construction, focus is on functional coverage
- Faster simulations: O(Log N) faster than constrained random and no solver.
- Goes beyond other verification languages (SystemVerilog and ‘e’)
- Works with your current VHDL testbench
- Uses entity and architectures for structure (just like RTL).
- Is language accessible. Able to refine with code.
- Readable by ALL (Verification and RTL engineers).